[0x00..0x3F] magic = b"RUL\x00\x01\x00\x00\x00" · 128-Bit Binary IR

The 128-Bit Binary Programming Language for AI Agents.

AI thinks in numbers and CPUs run binary — yet C, Go, and Rust force AI to type human text and wait seconds for a compiler to guess what it meant. Rul (.rl) deletes that text middleman: AI emits fixed 16-byte binary bricks carrying the Algorithm, CPU Schedule, and Memory Safety Ticket up front. Result: 5.8 ns safety verification, 6.4 µs standalone compilation, and 4.72x faster execution than hand-written C.

FIRST-PRINCIPLES IN 10 SECONDS · DELETE THE TEXT MIDDLEMAN

✗ OLD WAY (C / Go / Rust) AI Thinks (Numbers) → Types Human Text → Compiler Parses & Guesses Intent (Seconds) → Machine Code (0/1)

✓ RUL (.rl) FIRST-PRINCIPLES AI Thinks (Numbers) → Emits 16-Byte Binary Brick (5.8 ns Proof + 6.4 µs Compile) → Runs 4.72x Faster Than C

16-Byte Binary Brick (0ms Text Parse) + 6.4 µs Native ELF64 (Zero LLVM) + 5.8 ns Safety Proof (O(N) Linear)

# 1. Install standalone rul binary (0 rustc/LLVM runtime deps)
$ curl -fsSL https://raw.githubusercontent.com/rul-lang/rul/main/install.sh | sh

# 2. Scaffold, O(N) verify in ~5.8ns/node, compile 817B ELF64 & trace
$ rul new my-ai-pipeline && cd my-ai-pipeline
$ rul check   # ✓ Verified 7 SSA nodes in 0.04 µs (CAP_NONE = 0x0)
$ rul run     # ✓ Compiled 817-byte ELF64 in 6.4 µs -> Output: 77999800.0
$ rul trace   # ✓ White-Box Inspector: #0..#6 (NaN/Inf = 0)

Inspect 16-Byte Frame ↓ Read v0.4 Spec Whitepaper (DOI) ↗

LIVE .RL BINARY IMAGE · 7 SSA NODES = 208 BYTES -> 817-BYTE ELF64 CAP_NONE=0x0

Click any 16-byte instruction frame below to decode its bits, verifier proof, and trace:

RulHeader

64 Bytes (0x00..0x3F)

Arena[0] + Proof[0]

32 Bytes (0x40..0x5F)

NodeFrame[0..6]

112 Bytes (7 × 16B)

#0 ArenaInput

01 18 11 00 · read(0,1) · a=0 b=0

#1 ConstF64

02 11 11 00 · pure · const=100.0

#2 CmpGt

14 38 11 00 · pure · a=$n0 b=$n1

#3 Mul

12 18 12 00 · pure · a=$n0 b=$n0

#4 SelectZero

15 18 11 00 · pure · a=$n2 b=$n3

#5 ReduceSum

21 11 11 00 · pure · a=$n4 b=0

#6 AssertContract

40 11 11 00 · pure · a=$n5 b=0

Artifact (.rl) = Algorithm + Schedule + Proof ✓ 5.78 ns/node

[0x40] 128-Bit Frame

16 Bytes

Each Instruction Is a Fixed Binary Brick · 0 ms Text Parsing

[0x50] per instruction

5.78 ns

Instant Memory & Bounds Proof (Single O(N) Pass)

[0x60] native compile

6.4 µs

Standalone Linux x86_64 ELF64 Binary Without LLVM

[0x70] 4.72x vs C

51.53 GB/s

10M Numbers (80 MB) Accelerated by a 1-Byte Mutation

[0x80] INTERACTIVE 128-BIT WORKBENCH

ALIGN=64B · FRAME=16B (128-BIT)

One 16-Byte Instruction = Algorithm + Schedule + Proof

Select any instruction node (#0..#6) or click any byte (0..15) to inspect its 8-bit binary register, O(N) safety witness, and live white-box execution trace.

Algorithm Lane (What to compute: Opcode / Operands) Schedule Lane (How to run: SIMD / MultiCore) Proof Lane (Safety: Version Ticket / Bounds)

NODE #3 ($n3) node $n3 = Mul f64x8 fg=1 pol=simd proof=0 tok=pure a=$n0 b=$n0

16 BYTES = 128 BITS

8-BIT REGISTER BREAKDOWN · BYTE 2 (b16..b23) 0x12

0 2^7

0 2^6

0 2^5

1 2^4

0 2^3

0 2^2

1 2^1

0 2^0

Field: schedule_hint Type: u8

✓ O(N) Verifier Invariant Checked at Load Time (~5.78 ns) (fusion_group << 4) | exec_policy

Orthogonal hardware schedule byte: mutating 0x11 (SimdStream) -> 0x12 (MultiCore) changes CPU execution without altering safety proofs.

Node #3: Elementwise 8-lane vector square ($n0 * $n0) fused in L1 cache registers with zero intermediate heap allocation.

Symbolic Assembly View (src/main.rls — 208 B in .rl) ~8.8 µs assemble

cap 0x0

arena 0 len=4096 lane=f64x8 mut=false align=64 ver=1

output $n6

White-Box Execution Tracer (rul trace — 7 SSA Nodes) Click any row to synchronize 16-byte binary frame & assembly

NODE	OPCODE	KIND	LEN	MIN	MAX	SUM/TRUES	SAMPLE[0..4]
#0	ArenaInput	ColumnF64	4096	0.5000	249.5000	504608.0000	[0.500, 1.500, 2.500, 3.500]
#1	ConstF64	Scalar	1	100.0000	100.0000	100.0000	[100.000]
#2	CmpGt	ColumnMask	4096	0.0000	1.0000	2400.0000	[0.000, 0.000, 0.000, 0.000]
#3	Mul	ColumnF64	4096	0.2500	62250.2500	83627904.0000	[0.250, 2.250, 6.250, 12.250]
#4	SelectZero	ColumnF64	4096	0.0000	62250.2500	77999800.0000	[0.000, 0.000, 0.000, 0.000]
#5	ReduceSum	Scalar	1	77999800.0000	77999800.0000	77999800.0000	[77999800.000]
#6	AssertContract	Scalar	1	77999800.0000	77999800.0000	77999800.0000	[77999800.000]

[0x100] 1-BYTE HARDWARE SCHEDULE MUTATION

ALIGN=64B · FRAME=16B (128-BIT)

Mutate 1 Byte (Byte 2). Accelerate 4.72x Past Hand-Written C.

Real workload: 10,000,000 floating-point numbers (80 MB array) — filter values > 1000.0, square them, and sum to a single result. Click to mutate Byte 2 (schedule_hint) below: the algorithm stays 100% identical, while execution drops from 5.91 ms to 1.55 ms:

ACTIVE BYTE 2 (schedule_hint): 0x12 + ZM bits[16..23] = 0001 0010

1.55 ms · 51.53 GB/s (4.72x vs C)

fg=1 pol=multicore + ArenaZoneMap: Combines MultiCore L1 tiling with block min/max metadata (ArenaZoneMap) to skip cold 1,024-element tiles in O(1) without DRAM reads.

[A] Imperative AoS + Vec::collect() 1-Core AoS + Heap Allocation

70.66 ms 1.13 GB/s 0.10x

[B] Idiomatic Rust SoA (filter().map().sum()) 1-Core SoA Iterator Chain

19.12 ms 4.18 GB/s 0.38x

[C] Hand-Written C/Rust 8-Accumulator SoA 1-Core 8-Lane Unrolled Baseline

7.32 ms 10.92 GB/s 1.00x (Baseline)

[D] Rul (.rl) Tier 2 Fused SIMD (0x11) 1-Core L1-Tile SIMD (SimdStream)

5.91 ms 13.53 GB/s 1.24x (1-Core vs 1-Core)

[E] Rul (.rl) Tier 2 MultiCore (0x12) All Cores (1-Byte Schedule Mutation)

3.19 ms 25.04 GB/s 2.29x (Schedule Byte)

[F] Rul (.rl) Tier 2 MultiCore + ZoneMap All Cores + O(1) Cold Tile Skipping

1.55 ms 51.53 GB/s 4.72x (Peak Speedup)

Deep Pipeline Proof: BM-HORNER-50 (50-Step Polynomial · 104 SSA Nodes · 80 MB)

The linear-scan YMM register allocator in src/aot.rs compiles a 3,872-byte standalone ELF64 binary in ~20.4 µs and executes in 106.58 ms — matching hand-written 8-accumulator C/Rust (107.96 ms) with zero LLVM.

[0x140] FOUR FIRST-PRINCIPLES MECHANISMS

ALIGN=64B · FRAME=16B (128-BIT)

Simple in First Principles. Mathematically Exact in Silicon.

Traditional languages are slow to compile because the machine has to read human text and guess your intent. Rul removes all guessing through four self-evident mechanisms:

01 · BINARY SINGLE SOURCE OF TRUTH src/bytecode.rs

1. Zero Text Parsing (0% Syntax Errors)

Instead of forcing AI to type thousands of characters prone to missing semicolons, AI emits 16-byte binary bricks directly (or assembles flat .rls listings in ~8.8 µs). A 7-step pipeline processing 10 million numbers is just 208 bytes in .rl and compiles into a standalone 817-byte Linux ELF64 executable.

1. RulHeader 64 Bytes (64B-aligned)

2. ArenaDescriptor Table arena_count × 16 Bytes

3. ProofEntry Sidecar Table proof_count × 16 Bytes

4. NodeFrame Instruction DAG node_count × 16 Bytes

02 · LINEAR OWNERSHIP IN O(N) src/verifier.rs

2. Versioned Memory Tickets (Rust-Grade Safety in Nanoseconds)

Think of every memory buffer (Arena) as a room with a numbered ticket starting at version 1. Multiple instructions can read version 1 together (ReadLease 0b01). The moment an instruction modifies data in-place (AffineConsume 0b10), the room bumps to version 2 — any later instruction holding a stale version 1 ticket is rejected at the door in 5.78 ns without a slow Borrow Checker.

TOKEN_OP (32-BIT) = [mode: 2b | arena_id: 14b | version: 16b]

0b01 ReadLease(arena=0, ver=1) ✓ Shared Read (ver stays 1)

0b10 AffineConsume(arena=0, ver=1) → Mutate & Bump ver = 2

Reuse stale ReadLease(arena=0, ver=1) ✗ Reject: StaleOrConsumedToken

03 · ZERO-TRUST SANDBOX & BOUNDS ProofEntry + CapMask

3. Up-Front Bounds Certificates & Hardware Capability Switch

Equal-length columns run at full speed with zero inner-loop bounds checks (TRIVIAL_BY_SHAPE). Slicing an array (ArenaSlice) or jumping by index (Gather) requires presenting a 16-byte bounds certificate (ProofEntry) at load time. And when the hardware permission switch (CapabilityMask) is 0x0, the binary is physically blocked from touching the network or disk.

proof_idx == 0 (90%+ nodes): TRIVIAL_BY_SHAPE (0 runtime checks)

proof_idx > 0 (ArenaSlice / Gather): lo <= hi <= effective_target_len

RulHeader.capability_mask = 0x0: CAP_NONE (Pure Compute Sandbox)

04 · WHITE-BOX AUDITABILITY rul trace & decompile

4. X-Ray White-Box Transparency (Never a Black Box)

Humans never have to type binary to stay 100% in control: engineers set the data layout (ArenaDescriptor), hardware permissions (CapabilityMask), and output contracts (AssertContract); AI regenerates the .rl binary in microseconds. At any moment, run rul decompile for readable text or rul trace to inspect exact min, max, sum, and NaN=0 at every step.

Human Contract → AI Regenerates .rl

Verify + Compile in ~12 µs total

29-Opcode Spec →

[0x180] SYSTEMS MATRIX & AGENT MCP

ALIGN=64B · FRAME=16B (128-BIT)

C vs. Go vs. Rust vs. Rul (.rl)

Architectural comparison across parsing overhead, memory safety complexity, bounds checking, compilation latency, and sandbox security.

DIMENSION	C (clang -O3)	Go (gc)	Rust (rustc + LLVM)	Rul (.rl) v0.4
Primary Author	Human programmer	Human engineering teams	Human systems engineers	AI Agents (with human-auditable tools)
Artifact Format	Text (.c, .h)	Text (.go)	Text (.rs)	Flat Binary .rl (16-Byte Instructions)
Parse Overhead	High	Medium	Very High (Macros, AST)	0 ms (Direct zero-copy binary mmap)
Memory Safety	None (Manual pointers)	Garbage Collector (Runtime pauses)	Borrow Checker (Constraint solver)	Versioned TokenOp (O(1) check per node)
Bounds Checking	Unchecked (Buffer overflows)	Runtime branch per access	Runtime branch (unless elided)	Load-time Shape + ProofEntry sidecar table
Verify + Compile Time	Seconds	Sub-second to seconds	Seconds to minutes	~5.8 ns/node Verify + ~6.4 µs ELF64 AOT
Sandbox Security	Full OS process	Full OS process	Full OS process (unsafe crates)	64-Bit CapabilityMask in File Header

STDIO JSON-RPC 2.0 · src/mcp.rs

Built-In Model Context Protocol Server (rul-mcp)

Zero-dependency stdio JSON-RPC 2.0 server exposing 6 native verification, differential testing, autotuning, and AOT compilation tools directly to autonomous AI agents.

GET /.well-known/mcp.json ↗

rul_assemble_and_verify ~8.8 µs + 5.8 ns/node

(rls_source: string) -> VerifiedSummary + .rl hex

Assembles symbolic .rls instructions into a 128-bit binary .rl image and runs the single-pass O(N) static verifier.

rul_test_differential Tier 0 == Tier 1 == Tier 2

(rls_source: string, arenas: ArenaData[]) -> DiffReport

Executes the verified program across Tier 0 (Oracle), Tier 1 (Stencil), and Tier 2 (L1 Fused) to prove bitwise/ULP equivalence.

rul_autotune_schedule 1-Byte Sweep

(rls_source: string) -> Optimal ScheduleHint + Telemetry

Sweeps AutoL1Tile (0x10), SimdStream (0x11), and MultiCore (0x12) policies and selects the highest GB/s hardware reward score.

rul_compile_standalone ~6.4 µs ELF64

(rls_source: string) -> Standalone Linux x86_64 ELF64

Emits a zero-dependency Linux x86_64 AVX2 ELF64 executable (628 B – 1,037 B) using linear-scan YMM register allocation.

rul_trace White-Box Inspector

(rls_source: string) -> NodeTraceRow[0..N-1]

Returns exact per-node min, max, sum/trues, NaN/Inf count, and sample[0..4] telemetry across every SSA instruction.

rul_cas_intrinsics 64-Bit FNV-1a CAS

(op: sort | hash_join | group_by | simd_scan) -> CasHash

Executes verified I64/U8 content-addressed kernels (sort, hash_join, group_by, simd_scan_byte) in RulCasStore.

[0x1C0] ROADMAP TO v1.0

ALIGN=64B · FRAME=16B (128-BIT)

From Verified Columnar Engine (v0.4) to General-Purpose Systems Language (v1.0)

We restricted v0.1–v0.4 to array and vector pipelines (29 opcodes) to prove the 16-byte binary format on real silicon first. Over four milestones, Rul expands to replace Rust and Go for AI-generated systems software:

View Full Technical Roadmap & Non-Goals →

v0.1.0 → v0.4.0 Shipped Production Baseline

✓ PRODUCTION

29-Opcode Columnar SSA-DAG Core, White-Box Tracer & Linear-Scan AVX2 ELF64 AOT

Proved the 16-byte binary instruction format, single-pass O(N) verifier (~5.8 ns/node), 3-tier execution engine, rul-mcp server, and zero-LLVM native Linux ELF64 compiler (~6.4 µs) on real hardware.

[1] 64-byte RulHeader, 16-byte ArenaDescriptor, 16-byte ProofEntry, and 16-byte NodeFrame across 29 opcodes.
[2] Lossless .rls <-> .rl symbolic assembler, standalone rul CLI, rul-bench, and 6-tool rul-mcp server.
[3] Linear-scan YMM register allocator (ymm2..ymm13) achieving 51.53 GB/s (4.72x over C) on 80 MB arrays.

v0.5 Milestone 1 (Months 1–2)

● IN PROGRESS

General-Purpose Control Flow, Functions & Composite Data Types

Expand the 16-byte instruction set beyond numeric arrays to support general scalars, structs, enums, UTF-8 strings, hash maps, conditional branches, and termination-proven loops.

[1] First-class i64, i32, u8, f32, fixed-layout structs, algebraic tagged unions, validated UTF-8 strings, and arena hash maps.
[2] SelectBranch: conditional branching requiring both branches to merge at an identical memory version state (checked in O(1)).
[3] RegionLoop & Call: bounded loops with ProofEntry termination fuel/variant witnesses and modular functions verified without whole-program inlining.

v0.6 – v0.7 Milestone 2 (Months 2–3)

○ SCHEDULED

Rust-Grade Heap Ownership & Struct Lifetimes in O(N) Time

Generalize 32-bit TokenOp versions and 16-byte ProofEntry witnesses from flat arrays to region-based heap allocations and struct field borrows.

[1] Deterministic region heap allocation and deallocation tied to linear ownership tokens with zero GC and zero malloc/free fragmentation.
[2] Sidecar ProofEntry witnesses for disjoint struct field mutations and zero-copy sub-slice lifetimes checked in O(1) per instruction.
[3] Full protection against use-after-free, double-free, and aliasing without multi-second borrow-checker constraint solving.

v0.8 – v0.9 Milestone 3 (Months 4–5)

○ SCHEDULED

Go-Style Deterministic Concurrency & Capability-Gated OS I/O

Introduce lightweight tasks, ownership-transferring channels, and fine-grained header capability bits governing file, network, and process syscalls.

[1] Sending a buffer over a typed channel performs an AffineConsume on the sender token and transfers ownership to the receiver — preventing data races at load time without a GC.
[2] Extend 64-bit RulHeader.capability_mask to gate filesystem reads/writes, network sockets, timers, and subprocesses.
[3] A .rl binary with CAP_NONE (0x0) is mathematically blocked from making any network or disk call before execution starts.

v1.0 Milestone 4 (Month 6)

○ SCHEDULED

Multi-Architecture Native Backends (x86_64, ARM64, WASI) & Formal Soundness Proofs

Emit standalone executables across Linux, macOS, Windows, and WebAssembly without LLVM, backed by Kani model checking and a 50-program v1.0 conformance suite.

[1] Zero-LLVM native code generation for x86_64 and AArch64 (ARM64) across Linux, macOS, and Windows, plus deterministic WASI modules.
[2] Bounded model-checking proofs (Kani) and continuous differential fuzzing across the binary decoder, O(N) verifier, and native codegen.
[3] Frozen .rl v1.0 binary specification and public 50-program conformance test suite.

[0x1F0] DIRECT TECHNICAL ANSWERS (AEO / FAQ)

ALIGN=64B · FRAME=16B (128-BIT)

Frequently Asked Questions — From Plain English to Deep Systems

Clear first-principles explanations paired with exact empirical measurements for engineers, researchers, and AI answer engines.

Q01 What is Rul (.rl) and why does it use a 16-byte binary format instead of human text? +

AI thinks in numbers and CPUs run binary — yet languages like C, Go, and Rust force AI to type out thousands of human words and wait seconds for a compiler (rustc/LLVM) to translate that text back into binary. Rul (.rl) deletes the human text middleman: AI agents emit fixed 16-byte (128-bit) binary bricks carrying the Algorithm, CPU Schedule, and Memory Safety Ticket up front — eliminating text parsing (0 ms) and compiling standalone Linux ELF64 executables in ~6.4 µs.

Q02 How does Rul verify Rust-grade memory safety in ~5.8 ns per instruction without a slow borrow checker? +

Think of every memory buffer (Arena) as a room with a numbered version ticket starting at version 1. Multiple instructions can read version 1 at the same time using a shared ReadLease (0b01). When an instruction modifies the buffer in-place via AffineConsume (0b10), it checks that the buffer is mutable and bumps the room to version 2. Any later instruction holding a stale version 1 ticket is rejected at the door in O(1) time during a single forward pass (~5.78 ns/node) — no multi-second borrow-checker solver required.

Q03 If humans do not write .rl binary files by hand, how do engineering teams debug and maintain Rul systems? +

Humans stay 100% in control without typing binary — just as doctors read X-rays without drawing them by hand: (1) Humans set the rules up front — engineers define data schemas (ArenaDescriptor), hardware permission switches (64-bit CapabilityMask), and acceptance checks (AssertContract), while AI regenerates the verified .rl binary in microseconds; (2) Instant readable text via `rul decompile` converts any .rl file back into symbolic .rls assembly; (3) X-ray inspection via `rul trace` prints the exact min, max, sum, NaN/Inf count, and sample[0..4] values at every instruction step.

Q04 Why is the Rul toolchain implemented in Rust if Rul is designed to replace human text languages for AI agents? +

Every new systems language requires an initial host language for its bootstrap compiler — just as the first C compiler was written in assembly and the first Rust compiler was written in OCaml. We built the Rul verifier, 3-tier execution engine, and native ELF64 compiler in dependency-free Rust under #![forbid(unsafe_code)]. Once the standalone `rul` binary is installed, users and AI agents verify, compile, and run .rl programs directly without needing rustc, Cargo, or LLVM.

Q05 How does Rul achieve 51.53 GB/s (4.72x faster than hand-written C) by mutating a single byte? +

In Rul, hardware scheduling (Byte 2: schedule_hint) is orthogonal to algorithm logic (Byte 0: opcode). On an 80 MB (10,000,000 f64) filter-square-sum pipeline, single-core Rul (`0x11 SimdStream`) fuses all operations into 1,024-element L1-cache tiles in AVX2 YMM registers, running in 5.91 ms vs. 7.32 ms for hand-written 8-accumulator C (1.24x faster). Mutating Byte 2 from 0x11 to 0x12 (`MultiCore`) parallelizes those L1 tiles across all CPU cores (3.19 ms, 2.29x), and enabling `ArenaZoneMap` block min/max metadata skips cold tiles in O(1) to finish in 1.55 ms (51.53 GB/s, 4.72x faster than 1-core C and 45.51x faster than imperative AoS).

Q06 Can Rul replace Rust and Go for general-purpose backend and systems software? +

Yes — that is the exact target of the four-milestone v1.0 roadmap: Milestone 1 (v0.5) adds i64/i32/u8/f32, structs, tagged unions, UTF-8 strings, hash maps, O(1)-verified SelectBranch conditionals, and termination-proven RegionLoop iteration; Milestone 2 (v0.6–0.7) extends TokenOp and ProofEntry to region-based heap allocations and struct field borrows; Milestone 3 (v0.8–0.9) introduces Go-style lightweight tasks and ownership-transferring channels plus fine-grained CapabilityMask OS syscalls; Milestone 4 (v1.0) delivers zero-LLVM native backends for x86_64, ARM64, and WASI backed by Kani formal soundness proofs.